1. Field of the Invention
The present invention relates to a gain variable amplifier, in particular, a gain variable amplifier that varies a gain depending on a gain control signal.
2. Description of Related Art
In recent years, a gain variable amplifier (GCA) that amplifies a signal with an amplification degree corresponding to an input signal level has been adopted in the field of wireless communications. The gain variable amplifier stabilizes an output level by changing a gain of an amplifier even if an input signal level changes due to a state of a communication path etc. To that end, the gain variable amplifier is required to stably operate within a wide dynamic range (gain variation range) in which an output level can be stabilized even if an input signal level largely changes.
FIG. 5 is a circuit diagram showing the configuration of a conventional gain variable amplifier. As shown in FIG. 5, the conventional gain variable amplifier includes differential amplifier circuits 101 and 102, and a bias control circuit 103.
The differential amplifier circuit 101 includes transistors Q101 and Q102 as a differential pair. Transistors Q105 and Q106 are cascoded with drain terminals of the transistors Q101 and Q102, and source terminals of the transistors Q101 and Q102 are connected with one ends of feedback resistors Rs101 and Rs102. The other ends of the feedback resistors Rs101 and Rs102 are commonly connected with a variable power supply 111.
The differential amplifier circuit 102 includes transistors Q103 and Q104 as a differential pair similar to the differential amplifier circuit 101. Transistors Q107 and Q108 are cascoded with drain terminals of the transistors Q103 and Q104, and source terminals of the transistors Q103 and Q104 are connected with one ends of feedback resistors Rs103 and Rs104. The other ends of the feedback resistors Rs103 and Rs104 are commonly connected with a variable power supply 112. Drain terminals of the transistors Q105 and Q107 are commonly connected with a load resistor RL101 and an output terminal OUT, and drain terminals of the transistors Q106 and Q108 are commonly connected with a load resistor RL102 and an inverting output terminal OUTB.
Such a cascode amplifier circuit has been widely used. The cascoded transistors Q105 to Q108 function to increase an apparent conductance gm of the differential amplifier circuits 101 and 102, that is, increase an output impedance on the side of the output terminals OUT and OUTB. In the conventional gain variable amplifier, a constant voltage Vcas is applied to each gate of the cascoded transistors Q105 to Q108.
When an input signal is input to an input terminal IN, and an inverting input signal is input to an inverting input terminal INB, the transistors Q101 and Q104 amplify the input signal, and the transistors Q102 and Q103 amplify the inverting input signal. The signals amplified with the transistors Q101 and Q103 pass through the transistors Q105 and Q107, and then are added with the load resistor RL101 and output from the output terminal OUT. The signals amplified with the transistors Q102 and Q104 pass through the transistors Q106 and Q108, and then are added with the load resistor RL102 and output from the inverting output terminal OUTB.
Further, bias currents I1 and I2 of the variable power supplies 111 and 112 are kept at a current value corresponding to a control voltage Vctrl under the control of a bias control circuit 103. Owing to the bias currents I1 and I2, gain values of the differential amplifier circuits 101 and 102 continuously change. In other words, the gain values of the differential amplifier circuits 101 and 102 vary depending on the control voltage Vctrl, namely, the total gain of the conventional gain variable amplifier varies.
A desired gain value is obtained by setting the differential amplifier circuits 101 and 102 such that their gain values become different, and adjusting the bias currents I1 and I2. For example, the differential amplifier circuit 101 is set as a high-gain amplifier, while the differential amplifier circuit 102 is set as a low-gain amplifier. Then, in order to increase a gain, the differential amplifier circuit 101 is operated more than the circuit 102; in order to decrease a gain, the differential amplifier circuit 102 is operated more than the circuit 101.
In this example, the circuit is controlled so that the bias currents I1 and I2 change as shown in FIG. 6. That, the bias control circuit 103 executes control such that the sum of the bias currents I1 and I2 is always constant (I1 +I2=Iconstant) even if the control voltage Vctrl is changed. The value of the control voltage Vctrl corresponds to the total gain of the gain variable amplifier.
If the control voltage Vctrl is low, the bias current I2 amount exceeds the bias current I1 amount. In this case, the bias current I2 is increased up to Iconstant, while the bias current I1 falls down to 0 as shown in a portion (a) of FIG. 6. Thus, the gain (low gain) of the differential amplifier circuit 102 corresponds to the total gain of the gain variable amplifier.
Incidentally, an amplifier disclosed in Japanese Unexamined Patent Publication No. 2002-16458 typifies the conventional gain variable amplifier.
However, the conventional gain variable amplifier of FIG. 5 has a problem in that a distortion characteristic is deteriorated.
FIG. 7 shows a characteristic of an output power relative to the control voltage Vctrl (Po-1dB characteristic) in the conventional gain variable amplifier. As shown in a portion (c) of FIG. 7, in the conventional gain variable amplifier, the output power characteristic cannot draw a straight line but draws a concave curve (that protrudes downward), which means deterioration of the distortion characteristic. The portion (c) of FIG. 7 corresponds to the portion (a) of FIG. 6, that is, the output power characteristic of the portion (c) is obtained when the bias current I1 falls down to around 0.
In the conventional gain variable amplifier, if the control voltage Vctrl is reduced in order to decrease a gain value of the gain variable amplifier, the bias current I1 flowing through the high-gain differential amplifier circuit 101 reduces. As a result, voltages across the feedback resistors Rs101 and Rs102 are lowered to reduce a source potential of the transistors Q101 and Q102. Here, a constant bias (Vcas) is applied to the transistors Q105, and Q106, so a drain potential of the transistors Q101 and Q102 is kept constant all the time. Therefore, along with the reduction in bias current I1, a drain-source voltage of the transistors Q101 and Q102 increases. In general, if the drain-source voltage increases, the transistor operates in a saturation region. For example, if drain-source voltage VDS>(gate-source voltage VGS-threshold voltage Vth), the transistor operates in a saturation region. Thus, if signals are input to the input terminal IN and the inverting input terminal INB, the transistors Q101 and Q102 operate in a saturation region. As a result, if a high-level signal is input (heavy input), the distortion characteristic deteriorates.